1. Field of the Invention
The present invention relates to a semiconductor integral circuit that operates with a low voltage.
2. Description of Related Art
In recent years, semiconductor integral circuits that operate with a low voltage are being developed. In this type of circuit, the threshold values of P channel type MOS transistors (PMOS hereafter) and N channel type MOS transistors (NMOS hereafter), which constitute the semiconductor integral circuits, are adjusted so as to achieve low voltage operation.
In other words, the threshold value of each of the PMOS transistors that constitutes a semiconductor integral circuit that operates with a low voltage is set higher than the threshold value of PMOS transistors that constitutes a semiconductor integral circuit that operates with a high voltage. In the case of a PMOS transistor, the threshold value is negative. Therefore, the absolute value of the threshold value of a PMOS that constitutes a semiconductor integral circuit that operates with a low voltage is set smaller than the absolute value of the threshold value of a PMOS that constitutes a semiconductor integral circuit that operates with a high voltage. In the case of an NMOS transistor, the threshold value is positive. Therefore, the threshold value of an NMOS transistor that constitutes a semiconductor integral circuit that operates with a low voltage is set smaller than the threshold value of an NMOS transistor that constitutes a semiconductor integral circuit that operates with a high voltage.
In a semiconductor integral circuit that operates with a low voltage having PMOS transistors and NMOS transistors, the threshold values of the PMOS transistors are large and the threshold values of the NMOS transistors are small. Therefore, in such a semiconductor integral circuit, the leak current of the transistor increases, and the through current of an inverter or the like increases.
Given these problems, in a semiconductor integral circuit that operates with a low voltage having PMOS transistors and NMOS transistors, it is an object of the present invention to reduce the leak current of the transistors and the through current of the inverters.
To achieve the above-stated objectives, a semiconductor integral circuit according to the present invention has an analog circuit which changes linearly the voltage of an input signal and causes the amount of a current flowing through the analog circuit to change in accordance with the change in the voltage of the input signal. This semiconductor integral circuit also has a logic circuit to which an input signal having a first or second voltage is input. This logic circuit outputs an output signal having the first or second voltage in response to the first or second voltage of the input signal. The absolute value of the threshold value of each MOS transistor of the analog circuit is smaller than the absolute value of the threshold value of each MOS transistor of the logic circuit.
According to the present invention, in the semiconductor integral circuit, highly sensitive operation of the analog circuit is guaranteed, and the leak current and through current in the logic circuit can be reduced.